The present invention relates to a booster circuit and a method for controlling the same.
FIG. 5 shows a conventional booster circuit such as in Japanese Patent Publication Hei 06-311733. A booster circuit 300 is equipped with a series circuit formed from an inductor L and a diode D placed between a battery B and an electrical load F. A transistor Q1 (e.g., a MOS-FET) is placed between the inductor L and the diode D to allow exciting current to flow or stop. Also, the cathode end of the diode D is grounded by way of a capacitor C. Also, the booster circuit 300 is equipped with a booster control module 400 for turning the transistor Q1 on and off.
The booster control module 400 is formed from an ECU (electronic control unit) equipped with a ROM, a RAM, a CPU (central processing unit), and the like (not shown in the figure). In FIG. 5, the blocks in the booster control module 400 indicate control blocks representing functions executed by the CPU. The different modules shown in FIG. 5 represent functions executed by the control program and do not represent independent hardware units.
The booster control module 400 includes a target booster voltage setting module 410, a feedback control module 420, and a PWM output module 430. The target booster voltage setting module 410 reads a target booster voltage Vbpig* stored ahead of time in the ROM mentioned above and sends the target booster voltage Vbpig* to a feedback control module 420.
The feedback control module 420 calculates the deviation between the target booster voltage Vbpig* and an actual booster voltage Vbpig received by way of an A/D converter not shown in the figure. In order to reduce this deviation, i.e., to provide feedback control, proportional (P), integration (I), and deviation (D) operations are performed to calculate control values for the transistor Q1. Furthermore, the feedback control module 420 calculates a duty ratio (on-duty) α corresponding to the calculated control value and sends this to a PWM output module 430.
At the PWM output module 430, conversion to a duty ratio drive signal (PWM drive signal) is based on the duty ratio (on-duty) α. The converted duty ratio drive signal is applied to the transistor Q1 of the booster circuit 300. This duty ratio drive signal provides duty control for the transistor Q1.
More specifically, as a result of this duty control, the transistor Q1 performs switching as shown in FIG. 6, leading to the repeated build-up and discharge of energy in the inductor L. This causes a high voltage to appear on the cathode side of the diode D during discharges. As FIG. 6 shows, Tα represents on time, T is the pulse period, and α is the duty ratio (on-duty).
Current flows through the inductor L when the transistor Q1 is turned on and current flow through the inductor L is cut off when the transistor Q1 is turned off. When the current through the inductor L is cut off, a high voltage is generated on the cathode side of the diode D to prevent the magnetic flux from changing due to the current stopping. By repeating this process, the cathode side of the diode D is made to repeatedly generate a high voltage, which the capacitor C smoothes (charges), resulting in a boosted capacitor voltage (hereinafter referred to as actual booster voltage Vbpig).
The booster circuit 300 associates the boosted voltage with the duty ratio of a duty ratio drive signal output from the booster control section 400. If the duty ratio is high, the actual booster voltage Vbpig increases. If the duty ratio is low, the actual booster voltage Vbpig decreases.
The present applicant has proposed, such as in Japanese Patent Publication 2003-89360, a booster circuit which, instead of the diode D described above, is equipped with transistor (MOS-FET) with a drain connected to an electrical load F and a source connected to the inductor L. In this arrangement, two transistors are turned on and off in an alternating manner, providing synchronous rectification control. For feedback control, a control method similar to the conventional example shown in FIG. 5 is used.
Conventional feedback control works with no problems if a power supply voltage (input voltage) Vpig is stable. However, during the initial period where there is no feedback, if the power supply voltage Vpig changes, the actual booster voltage Vbpig increases when the power supply voltage Vpig increases because the duty ratio (on duty) α does not change. Conversely, when the power supply voltage Vpig decreases, the actual booster voltage Vbpig also decreases. Then, with feedback control, the deviation between a target booster voltage Vbpig* and the changed actual booster voltage Vbpig also changes. By varying the duty ratio (on duty) calculated to eliminate this deviation, the voltage is made to converge to the target booster voltage.
However, there is a limit to the degree of responsiveness possible with feedback control. Thus, it is not possible to track sudden changes in the power supply voltage Vpig, which can make the actual booster voltage Vbpig unstable.